*** 0.10a *** 13/06/2005: release 0.10a to fix bugs -- 0.11a should have new database for some chips. minor string changes in x86test.S and cpu_lookup.S. 12/06/2005: move platform tests to seperate function and add #GP checks for MSR reads -- it seems only deschutes and later support platform ID. 01/06/2005: minor P6, P6T and deschutes corrections in cpu_lookup.S. 30/05/2005: ignore cpuid #1 %ebx on Centaur as for cyrix in cpuid.S. cyrix 6x86/6x86L (M1) fix for loop_clock_test -- loop instruction only takes 2 cycles on these chips (and they don't have a TSC). workaround for AMD K5 SSA5 with APIC bit incorrectly set. 26/05/2005: minor AMD fixes in cpu_lookup.S. changes to centaur checking at start of cpuid routine, including support for VIA FCR MSRs. Most centaur chips still untested! 25/05/2005: added intel cache entries 0x78,7d,7f and ignore 0xf0,f1 (64/128 byte prefetch size). 20/05/2005: minor AMD 486 fixes. *** 0.09a *** 15/05/2005: lots more AMD family f updates, including mobile codenames. extended model 2 stuff may still be incomplete. *** 0.08a *** 14/05/2005: updated AMD family f support, includeing correct (i think) entries for Newcastle and Winchester, as well as preliminary entries for San Diego/Venice/Palermo and Toledo/Manchester (the X2). Minor intel updates. fixed extended model reporting in cpuid.S. 04/05/2005: improved output for cpuid_probe. *** 0.07a *** 19/04/2005: avoid testing DIV flags after CPUID for cyrix (start of x86test.S). Added preliminary intel Smithfield entry in cpu_lookup.S. 14/04/2005: increase 14.318MHz divisor limit to allow divisor of 64. This should only be needed when we only know the core clock and there is a half-integer multiplier e.g. I have a skt7 board with 115MHz FSB as 257/32 * 14.318MHz, with a 2.5x multiplier the core clock is then 1285/64 * 14.318MHz. ignore %ebx output for cpuid #1 on cyrix (they return "Cyri" as for cpuid #0). 05/04/2005: print proper 96-bit PSN for cpuid #3. 04/04/2005: re-wrote cpuid #0x80000005 code, including support for crusoe. Also other cpuid fixes for new intel functions. added number of logical (HTT) processors for cpuid #1. *** 0.06a *** 27/03/2005: added psn command to disable serial number reporting on P3. 25/03/2005: add intel prescott N0 and dothan C-0 steppings to cpu_lookup.S. updated feature flags in cpuid.S *** 0.05a *** 06/03/2005: get loop_clock_test to use highest measurement from several ticks to work around clock-stealing SMIs etc. moved setup_tramp in lilo.S so grub works, also added a version string. added a cld to start of realmode.S. updated INSTALL. updated Makefile. *** 0.04a *** 02/03/2005: release 0.04a -- again only minor update, mostly bug fixes. 01/03/2005: fixed bug in cyrix_test that was trashing cpu_features after cpuid. 27/02/2005: reset SSEDIS flag in HWCR MSR for AMD K7/K8 in cpuid.S. workaround AMD thunderbird A1/A2 CPUID L2 bug as for spitfire A0 in cpuid.S. Added GP fault checking in apic_init -- not sure about K7 model 1. 21/02/2005: tidy-up/rearrangement/updates of cpuid.S 17/02/2005: removed VGA horizontal timing and 8/9-dot stuff from term.S to improve reliability. updates to cyrix MediaGX section of cpu_lookup.S. changed default IRQ0 handling in pm.S. 16/02/2005: cyrix MediaGX fix for loop_clock_test -- loop instruction only takes 3 cycles on these chips. *** 0.03a *** 09/01/2005: this is only a minor update to 0.02a -- if 0.02a didn't work then chances are 0.03a won't either! notable changes since 0.02a: - many additions/fixes to cpu database (cpu_lookup.S). mostly intel/AMD. - seperated real-mode code used at startup into realmode.S - added reporting of intel platform ID - made some functions available as user commands - no longer run crappy bios_test by default - less informational messages that users won't care about. - removed brand ID translation in cpuid.S. - numerous minor corrections and optimisations